ltc1069-1 1 10691fa frequency response single 3.3v supply 3khz elliptic lowpass filter typical application description low power, 8th order progressive elliptic, lowpass filter the ltc ? 1069-1 is a monolithic 8th order lowpass ? lter featuring clock-tunable cutoff frequency and 2.5ma power supply current with a single 5v supply. an additional feature of the ltc1069-1 is operation with a single 3.3v supply. the cutoff frequency (f cutoff ) of the ltc1069-1 is equal to the clock frequency divided by 100. the gain at f cutoff is C0.7db and the typical passband ripple is 0.15db up to 0.9f cutoff . the stopband attenuation of the ltc1069-1 features a progressive elliptic response reaching 20db attenuation at 1.2f cutoff , 52db attenuation at 1.4f cutoff and 70db attenuation at 2f cutoff . with 5v supplies, the ltc1069-1 cutoff frequency can be clock-tuned up to 12khz; with a single 5v supply, the maximum cutoff frequency is 8khz. the low power feature of the ltc1069-1 does not penal- ize the devices dynamic range. with 5v supplies and an input range of 0.3v rms to 2.5v rms , the signal-to-(noise + thd) ratio is 70db. the wideband noise of the ltc1069-1 is 110v rms . other ? lter responses with lower power or higher speed can be obtained. please contact ltc market- ing for details . the ltc1069-1 is available in 8-pin pdip and 8-pin so packages. l , lt, ltc and ltm are registered trademarks of linear technology corporation. all other trademarks are the property of their respective owners. features applications n 8th order elliptic filter in so-8 package n operates from single 3.3v to 5v power supplies n C20db at 1.2f cutoff n C52db at 1.4f cutoff n C70db at 2f cutoff n wide dynamic range n 110v rms wideband noise n 3.8ma supply current with 5v supplies n 2.5ma supply current with single 5v supply n 2ma supply current with single 3.3v supply n telecommunication filters n antialiasing filters v out v C nc clk agndv + ncv in 0.1f 0.47f 3.3v v in 1069-1 ta01 v out ltc1069-1 f clk 300khz + frequency (khz) 1.5 C80 gain (db) C70 C50 C40 C30 4.5 10 10691 ta02 C60 3 7.5 6 C20 C10 0 downloaded from: http:///
ltc1069-1 2 10691fa absolute maximum ratings total supply voltage (v + to v C ) .................................12v maximum voltage at any pin .............................(v C C 0.3v) v (v+ + 0.3v) (note 1) order information pin configuration 12 3 4 87 6 5 top view agnd v + nc v in v out v C ncclk n8 package 8-lead plastic dip t jmax = 110c, ja = 100c/w 12 3 4 87 6 5 top view v out v C ncclk agnd v + nc v in s8 package 8-lead plastic so t jmax = 125c, ja = 130c/w operating temperature range ltc1069c-1 ............................................. 0c to 70c ltc1069i-1 .......................................... C40c to 85c storage temperature range ................... C65c to 150c lead temperature (soldering, 10 sec) .................. 300c electrical characteristics the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. f cutoff is the ? lters cutoff frequency and is equal to f clk /100. the f clk signal level is ttl or cmos (clock rise or fall time 1s), v s = 3.3v to 5v, r l = 10k, unless otherwise noted. all ac gains are measured relative to the passband gain. parameter conditions min typ max units passband gain (f in 0.25f cutoff )v s = 5v, f clk = 500khz f test = 1.25khz, v in = 1v rms l C0.30C0.35 0.2 0.70 0.75 dbdb v s = 3.3v, f clk = 200khz f test = 0.5khz, v in = 0.5v rms l C0.30C0.35 0.2 0.70 0.75 dbdb lead free finish tape and reel part marking* package description specified temperature range ltc1069-1cn8#pbf ltc1069-1 8-lead plastic dip 0c to 70c ltc1069-1in8#pbf ltc1069-1 8-lead plastic dip C40c to 85c ltc1069-1cs8#pbf ltc1069-1cs8#trpbf 10691 8-lead plastic so 0c to 70c ltc1069-1is8#pbf ltc1069-1is8#trpbf 10691i 8-lead plastic so C40c to 85c consult ltc marketing for parts speci? ed with wider operating temperature ranges. *the temperature grade is identi? ed by a label on the shipping container. consult ltc marketing for information on non-standard lead based ? nish parts. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ for more information on tape and reel speci? cations, go to: http://www.linear.com/tapeandreel/ downloaded from: http:///
ltc1069-1 3 10691fa electrical characteristics note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. the l denotes the speci? cations which apply over the full operating temperature range, otherwise speci? cations are at t a = 25c. f cutoff is the ? lters cutoff frequency and is equal to f clk /100. the f clk signal level is ttl or cmos (clock rise or fall time 1s), v s = 3.3v to 5v, r l = 10k, unless otherwise noted. all ac gains are measured relative to the passband gain. parameter conditions min typ max units gain at 0.50f cutoff v s = 5v, f clk = 500khz f test = 2.5khz, v in = 1v rms l C0.10C0.11 C0.03 0.10 0.11 dbdb v s = 3.3v, f clk = 200khz f test = 1khz, v in = 0.5v rms l C0.10C0.11 C0.03 0.10 0.11 dbdb gain at 0.75f cutoff v s = 5v, f clk = 500khz f test = 3.75khz, v in = 1v rms l C0.20C0.25 0.04 0.20 0.25 dbdb v s = 3.3v, f clk = 200khz f test = 1.5khz, v in = 0.5v rms l C0.20C0.25 0.04 0.20 0.25 dbdb gain at 0.90f cutoff v s = 5v, f clk = 500khz f test = 4.5khz, v in = 1v rms l C0.20C0.25 C0.01 0.20 0.25 dbdb v s = 3.3v, f clk = 200khz f test = 1.8khz, v in = 0.5v rms l C0.20C0.25 C0.01 0.20 0.25 dbdb gain at 0.95f cutoff v s = 5v, f clk = 500khz f test = 4.75khz, v in = 1v rms l C0.30C0.35 C0.05 0.30 0.35 dbdb v s = 3.3v, f clk = 200khz f test = 1.9khz, v in = 0.5v rms l C0.30C0.35 C0.04 0.30 0.35 dbdb gain at f cutoff v s = 5v, f clk = 500khz f test = 5.0khz, v in = 1v rms l C1.25C1.35 C0.70 C0.25 C0.15 dbdb v s = 3.3v, f clk = 200khz f test = 2.0khz, v in = 0.5v rms l C1.25C1.35 C0.61 C0.25 C0.15 dbdb gain at 1.25f cutoff v s = 5v, f clk = 500khz f test = 6.25khz, v in = 1v rms l C30C31 C27 C25 C24 dbdb v s = 3.3v, f clk = 200khz f test = 2.5khz, v in = 0.5v rms l C30C31 C27 C25 C24 dbdb gain at 1.50f cutoff v s = 5v, f clk = 500khz f test = 7.5khz, v in = 1v rms l C58C59 C53 C50 C49 dbdb v s = 3.3v, f clk = 200khz f test = 3khz, v in = 0.5v rms l C58C59 C53 C50 C49 dbdb output dc offset (input at agnd) v s = 5v, f clk = 500khz v s = 4.75v, f clk = 400khz v s = 3.3v, f clk = 200khz 3020 15 150100 mvmv mv output voltage swing v s = 5v v s = 4.75v v s = 3.3v ll l C3.25C1.50 C0.70 4.01.7 0.9 3.251.25 0.60 vv v power supply current v s = 5v, f clk = 500khz v s = 4.75v, f clk = 400khz v s = 3.3v, f clk = 200khz ll l 3.82.5 2.0 5.54.5 3.5 mama ma maximum clock frequency v s = 5v v s = 4.75v v s = 3.3v 1.20.8 0.5 mhzmhz mhz input frequency range 0f clk /2 mhz input resistance 30 43 70 k operating power supply voltage 1.57 5.5 v downloaded from: http:///
ltc1069-1 4 10691fa typical performance characteristics passband gain vs clock frequency, v s = single 3.3v passband gain vs clock frequency, v s = single 5v passband gain vs clock frequency, v s = 5v gain vs supply voltage phase and group delay vs frequency transient response passband gain vs frequency transition band gain vs frequency stopband gain vs frequency frequency (khz) 0.5 gain (db) 1.00.8 0.6 0.4 0.2 0 C0.2C0.4 C0.6 C0.8 C1.0 1.5 2.5 3.0 5.0 10691 g01 1.0 2.0 3.5 4.0 4.5 v s = 5v f clk = 500khz f c = 5khz v in = 2v rms frequency (khz) 5678 91011 gain (db) 10 0 C10C20 C30 C40 C50 C60 C70 C80 C90 10691 g02 v s = 5v f clk = 500khz f c = 5khz v in = 2v rms frequency (khz) 11 12 13 14 15 16 17 18 19 20 21 gain (db) C70C72 C74 C76 C78 C80 C82 C84 C86 C88 C90 10691 g03 v s = 5v f clk = 500khz f c = 5khz v in = 2v rms frequency (khz) 0.5 gain (db) 6.5 10691 g04 2.5 4.5 2.01.5 1.0 0.5 0 C0.5C1.0 C1.5 C2.0 1.5 3.5 5.5 7.5 f clk = 750khz f c = 7.5khz f clk = 500khz f c = 5khz v s = single 3.3v v in = 0.5v rms frequency (khz) 1 gain (db) 13 10691 g06 59 2.01.5 1.0 0.5 0 C0.5C1.0 C1.5 C2.0 3 7 11 15 f clk = 1.5mhz f c = 15khz v s = 5v v in = 2v rms f clk = 500khz f c = 5khz f clk = 1mhz f c = 10khz frequency (khz) 0.5 gain (db) 6.5 10691 g05 2.5 4.5 2.01.5 1.0 0.5 0 C0.5C1.0 C1.5 C2.0 1.5 3.5 5.5 7.5 8.5 9.5 10.5 f clk = 500khz f c = 5khz v s = single 5v v in = 1.2v rms f clk = 750khz f c = 7.5khz f clk = 1mhz f c = 10khz frequency (khz) 1357 91113 15 17 19 21 gain (db) 10 0 C10C20 C30 C40 C50 C60 C70 C80 C90 10691 g07 f clk = 500khz v in = 0.5v rms v s = 5v v s = 3.3v v s = 5v frequency (khz) 0 phase (deg) group delay (ms) 6 10691 g08 24 0 C90 C180C270 C360 C450 C540 C630 C720 0.60.5 0.4 0.3 0.2 0.1 0 1357 v s = single 5v f clk = 500khz f c = 5khz group delay phase 0.2ms/div 1v/div 10691 g09 v s = 5v f clk = 1mhz f in = 500hz 4v p-p square wave downloaded from: http:///
ltc1069-1 5 10691fa typical performance characteristics supply current vs supply voltage supply current vs clock frequency output voltage swing vs temperature dynamic rangethd + noise vs v in (v rms ) thd + noise vs frequency thd + noise vs frequency input voltage (v rms ) 0.1 0.3 0.65 thd + noise (db) C40C45 C50 C55 C60 C65 C70 C75 C80 C85 C90 1.0 1.22 2.67 2.0 5.0 10691 g10 f clk = 500khz f in = 1khz v s = 3.3v v s = 5v v s = 5v input frequency (khz) 1 thd + noise (db) C60C62 C64 C66 C68 C70 C72 C74 C76 C78 C80 5 4 3 2 10691 g11 f clk = 500khz v in = 300mv rms v s = 5v v s = 5v v s = 3.3v input frequency (khz) 1 thd + noise (db) C40C45 C50 C55 C60 C65 C70 C75 C80 C85 C90 5 4 3 2 10691 g12 f clk = 500khz v s = 3.3v v in = 0.5v rms v s = 5v v in = 1v rms v s = 5v v in = 2v rms total supply voltage (v) 0 supply current (ma) 1 2 34 10691 g13 5 54 3 2 1 0 6 C40c 25c 85c f clk = 10hz clock frequency (mhz) 0.1 supply current (ma) 5.04.5 4.0 3.5 3.0 2.5 2.0 0.2 0.6 0.8 10691 g14 0.5 1.0 1.2 0.3 0.4 0.7 0.9 v s = 3.3v v s = 5v v s = 5v ambient temperature (c) C40 C20 0 20 40 60 80 output voltage swing (v) 54 3 2 1 0 C1C2 C3 C4 C5 10691 g15 v s = 5v v s = 2.5v v s = 1.57v v s = 1.57v v s = 2.5v v s = 5v downloaded from: http:///
ltc1069-1 6 10691fa pin functions agnd (pin 1): analog ground. the quality of the analog signal ground can affect the ? lter performance. for either single or dual supply operation, an analog ground plane surrounding the package is recommended. the analog ground plane should be connected to any digital ground at a single point. for dual supply operation pin 1 should be connected to the analog ground plane. for single supply operation pin 1 should be bypassed to the analog ground plane with a 0.47f or larger capaci- tor. an internal resistive divider biases pin 1 to 1/2 the total power supply. pin 1 should be buffered if used to bias other ics. figure 1 shows the connections for single supply operation. v + , v C (pins 2, 7): power supply pins. the v + (pin 2) and the v C (pin 7) should be bypassed with a 0.1f capacitor to an adequate analog ground. the ? lters power supplies should be isolated from other digital or high voltage analog supplies. a low noise linear supply is recommended. using switching power supplies will lower the signal-to-noise ratio of the ? lter. unlike previous monolithic ? lters, the power supplies can be applied at any order, that is, the positive supply can be applied before the negative supply and vice versa. figure 2 shows the connection for dual supply operation. nc (pins 3, 6): no connection. pins 3 and 6 are not con- nected to any internal circuity; they should be preferably tied to ground. v in (pin 4): filter input pin. the ? lter input pin is internally connected to the inverting input of an op amp through a 43k resistor. clk (pin 5): clock input pin. any ttl or cmos clock source with a square wave output and 50% duty cycle (10%) is an adequate clock source for the device. the power supply for the clock source should not necessarily be the ? lters power supply. the analog ground of the ? lter should be connected to clocks ground at a single point only. table 1 shows the clocks low and high level threshold value for a dual or a single supply operation. a pulse generator can be used as a clock source provided the high level on time is greater than 0.42s (v s = 5v). sine waves less than 100khz are not recommended for clock signal because excessive slow clock rise or fall times generate internal clock jitter. the maximum clock rise or fall is 1s. the clock signal should be routed from the right side of the ic package to avoid coupling into any input or output analog signal path. a 1k resistor between the clock source and the clock input pin (5) will slow down the rise and fall times of the clock to further reduce charge coupling, figure 1. table 1. clock source high and low thresholds power supply high level low level dual supply = 5v 1.5v 0.5v single supply = 10v 6.5v 5.5v single supply = 5v 1.5v 0.5v single supply = 3.3v 1.2v 0.5v v out (pin 8): filter output pin. pin 8 is the output of the ? lter and it can source or sink 1ma. driving coaxial cables or resistive loads less than 20k will degrade the total har- monic distortion of the ? lter. when evaluating the devices dynamic range, a buffer is required to isolate the ? lters output from coax cables and instruments. figure 1. connections for single supply operation figure 2. connections for dual supply operation 12 3 4 87 6 5 v out v C nc clk agndv + ncv in v + 0.1f 0.47f v in 10691 f01 v out 1k ltc1069-1 analog ground plane digital ground plane starsystem ground clock source 12 3 4 87 6 5 v out v C nc clk agndv + ncv in v + v C 0.1f 0.1f v in v out 1k ltc1069-1 analog ground plane digital ground plane starsystem ground clock source 10691 f02 downloaded from: http:///
ltc1069-1 7 10691fa applications information temperature behavior the power supply current of the ltc1069-1 has a positive temperature coef? cient. the gbw product of its internal op amps is nearly constant and the speed of the device does not degrade at high temperatures. figures 3a, 3b and 3c show the behavior of the maximum passband of the device for various supplies and temperatures. the ? lter, especially at 5v supply, has a passband behavior which is nearly temperature independent. clock feedthrough the clock feedthrough is de? ned as the rms value of the clock frequency and its harmonics that are present at the ? lters output pin (8). the clock feedthrough is tested with the input pin (4) shorted to the agnd pin and depends on pc board layout and on the value of the power supplies. with proper layout techniques the values of the clock feedthrough are shown on table 2. table 2. clock feedthrough v s clock feedthrough 3.3v 10v rms 5v 40v rms 5v 160vrms any parasitic switching transients during the rise and fall edges of the incoming clock are not part of the clock feedthrough speci? cations. switching transients have frequency contents much higher than the applied clock; their amplitude strongly depends on scope probing tech- niques as well as grounding and power supply bypassing. the clock feedthrough can be reduced, if bothersome, by adding a single rc lowpass ? lter at the output pin (8) of the ltc1069-1. wideband noise the wideband noise of the ? lter is the total rms value of the devices noise spectral density and determines the operating signal-to-noise ratio. most of the wideband noise frequency contents lie within the ? lter passband. the wideband noise cannot be reduced by adding post ? ltering. the total wideband noise is nearly independent of the clock frequency and depends slightly on the power supply voltage (see table 3). the clock feedthrough speci ? cations are not part of the wideband noise. table 3. wideband noise v s wideband noise 3.3v 100v rms 5v 108v rms 5v 112v rms figure 3a figure 3b figure 3c frequency (khz) 0.5 gain (db) 6.5 10691 f03a 2.5 4.5 2.01.5 1.0 0.5 0 C0.5C1.0 C1.5 C2.0 1.5 3.5 5.5 7.5 v s = 3.3v f clk = 750khz v in = 0.5v rms t a = 85c t a = 25c t a = C40c frequency (khz) 0.5 gain (db) 6.5 10691 f03b 2.5 4.5 2.01.5 1.0 0.5 0 C0.5C1.0 C1.5 C2.0 1.5 3.5 5.5 7.5 8.5 9.5 10.5 v s = 5v f clk = 1mhz v in = 1.2v rms t a = 25c t a = 85c t a = C40c frequency (khz) 1 gain (db) 13 10691 f03c 59 2.01.5 1.0 0.5 0 C0.5C1.0 C1.5 C2.0 3 7 11 15 v s = 5v f clk = 1.5mhz v in = 2v rms t a = 85c t a = C40c t a = 25c downloaded from: http:///
ltc1069-1 8 10691fa applications information aliasingaliasing is an inherent phenomenon of sampled data systems and it occurs for input frequencies approaching the sampling frequency. the internal sampling frequency of the ltc1069-1 is 100 times its cutoff frequency. for instance, if a 98khz, 100mv rms signal is applied at the input of an ltc1069-1 operating with a 100khz clock, a 2khz, 28v rms alias signal will appear at the ? lter output. table 4 shows details. table 4. aliasing (f clk = 100khz) input frequency (v in = 1v rms ) (khz) output level (relative to input) (db) output frequency (aliased frequency) (khz) f clk /f c = 100:1, f cutoff = 1khz 96 (or 104) 97 (or 103) 98 (or 102) 98.5 (or 101.5) 99 (or 101) 99.5 (or 100.5) C90.0C86.0 C71.0 C56.0 C1.1 C0.21 4.03.0 2.0 1.5 1.0 0.5 typical applications single 3.3v supply operation with output buffer single 5v operation with power shutdown 12 3 4 87 6 5 v out v C nc clk agndv + ncv in 0.1f 0.47f shutdown on 5v v in v out 1069-1 ta04 ltc1069-1 f clk 750khz 5v0v cmos logic 12 3 4 87 6 5 v out v C nc clk agndv + ncv in 0.1f 0.47f v in v out 10691 ta05 ltc1069-1 f clk 500khz 3.3v0v C + 1/2 lt1366 3.3v 0.1f downloaded from: http:///
ltc1069-1 9 10691fa information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. .016 ?.050 (0.406 ?1.270) .010 ?.020 (0.254 ?0.508) 45 0 ?8 typ .008 ?.010 (0.203 ?0.254) so8 0303 .053 ?.069 (1.346 ?1.752) .014 ?.019 (0.355 ?0.483) typ .004 ?.010 (0.101 ?0.254) .050 (1.270) bsc 1 2 3 4 .150 ?.157 (3.810 ?3.988) note 3 8 7 6 5 .189 ?.197 (4.801 ?5.004) note 3 .228 ?.244 (5.791 ?6.197) .245 min .160 .005 recommended solder pad layout .045 .005 .050 bsc .030 .005 typ inches (millimeters) note:1. dimensions in 2. drawing not to scale3. these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .006" (0.15mm) n8 1002 .065 (1.651) typ .045 ?.065 (1.143 ?1.651) .130 .005 (3.302 0.127) .020 (0.508) min .018 .003 (0.457 0.076) .120 (3.048) min 12 3 4 87 6 5 .255 .015* (6.477 0.381) .400* (10.160) max .008 ?.015 (0.203 ?0.381) .300 ?.325 (7.620 ?8.255) .325 +.035?015 +0.889 0.381 8.255 () note:1. dimensions are inches millimeters *these dimensions do not include mold flash or protrusions. mold flash or protrusions shall not exceed .010 inch (0.254mm) .100 (2.54) bsc package description s8 package 8-lead plastic small outline (narrow .150 inch) (reference ltc dwg # 05-08-1610) n package 8-lead pdip (narrow .300 inch) (reference ltc dwg # 05-08-1510) downloaded from: http:///
ltc1069-1 10 10691fa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax: (408) 434-0507 www.linear.com ? linear technology corporation 1996 lt 0309 rev a printed in usa related parts typical application 12 3 4 87 6 5 v out v C nc clk agndv + ncv in 0.1f 0.1f 5v0v 5v C5v v in v out ltc1069-1 f clk 500khz f c = 5khz input voltage (v rms ) 0.1 C85 thd + noise (db) C80 C75 C70 C65 C45 13 10691 ta03 C60 C55 C50 f in = 1khz dual supply operation part number description comments ltc1068 very low noise, high accuracy, quad universal filter building block user-con? gurable, ssop package ltc1069-6 single supply, very low power, elliptic lpf 50:1 f clk /f c ratio, 8-pin so package ltc1164-5 low power 8th order butterworth lpf 100:1 and 50:1 f clk /f c ratio ltc1164-6 low power 8th order elliptic lpf 100:1 and 50:1 f clk /f c ratio ltc1164-7 low power 8th order linear phase lpf 100:1 and 50:1 f clk /f c ratio downloaded from: http:///
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